Pin

Name

DT Offset

Mode

BBB Usage

First rev

Rev B

0

1

2

3

4

5

6

7

P8

1

-

GND

P8

2

-

GND

P8

3

R9

GPIO1_6

0x018

gpmc_ad6

mmc1_dat6

-

-

-

-

-

Gpio1[06]

EMMC

P8

4

T9

GPIO1_7

0x01C

gpmc_ad7

mmc1_dat7

-

-

-

-

-

Gpio1[07]

EMMC

P8

5

R8

GPIO1_2

0x008

gpmc_ad2

mmc1_dat2

-

-

-

-

-

Gpio1[02]

EMMC

P8

6

T8

GPIO1_3

0x00C

gpmc_ad3

mmc1_dat3

-

-

-

-

-

Gpio1[03]

EMMC

P8

7

R7

TIMER4

0x090

gpmc_advn_ale

-

timer4

-

-

-

-

Gpio2[02]

Expansion6 J7-9

Same

P8

8

T7

TIMER7

0x094

gpmc_oen_ren

-

timer7

-

-

-

-

Gpio2[03]

Expansion7 J7-11

Same

P8

9

T6

TIMER5

0x09C

gpmc_ben0_cle

-

timer5

-

-

-

-

Gpio2[05]

Expansion9 J7-5

Same

P8

10

U6

TIMER6

0x098

gpmc_wen

-

timer6

-

-

-

-

Gpio2[04]

Expansion8 J7-7

Same

P8

11

R12

GPIO1_13

0x034

gpmc_ad13

lcd_data18

mmc1_dat5

mmc2_dat1

eQEP2B_in

pr1_mii0_txd1

pr1_pru0_pru_r30_15

gpio1[13]

MFM0_IN

Same

P8

12

T12

GPIO1_12

0x030

gpmc_ad12

lcd_data19

mmc1_dat4

mmc2_dat0

eQEP2A_IN

pr1_mii0_txd2

pr1_pru0_pru_r30_14

gpio1[12]

MFM1_IN

Same

P8

13

T10

EHRPWM2B

0x024

gpmc_ad9

lcd_data22

mmc1_dat1

mmc2_dat5

ehrpwm2B

pr1_mii0_col

-

gpio0[23]

Sel2

Same

P8

14

T11

GPIO0_26

0x028

gpmc_ad10

lcd_data21

mmc1_dat2

mmc2_dat6

ehrpwm2_tripzone_in

pr1_mii0_txen

-

gpio0[26]

Sel3

Same (read only)

P8

15

U13

GPIO1_15

0x03C

gpmc_ad15

lcd_data16

mmc1_dat7

mmc2_dat3

eQEP2_strobe

pr1_ecap0_ecap_capin_apwm_o

pr1_pru0_pru_r31_15

gpio1[15]

MFM_data

Same

P8

16

V13

GPIO1_14

0x038

gpmc_ad14

lcd_data17

mmc1_dat6

mmc2_dat2

eQEP2_index

pr1_mii0_txd0

pr1_pru0_pru_r31_14

gpio1[14]

GND for detect

P8

17

U12

GPIO0_27

0x02C

gpmc_ad11

lcd_data20

mmc1_dat3

mmc2_dat7

ehrpwm0_synco

pr1_mii0_txd3

-

gpio0[27]

Sel4

Same (read only)

P8

18

V12

GPIO2_1

0x08C

gpmc_clk

lcd_memory_clk

gpmc_wait1

mmc2_clk

pr1_mii1_crs

pr1_mdio_mdclk

mcasp0_fsr

Gpio2[01]

Expansion5 J7-3

Same

P8

19

U10

EHRPWM2A

0x020

gpmc_ad8

lcd_data23

mmc1_dat0

mmc2_dat4

ehrpwm2A

pr1_mii_mt0_clk

-

gpio0[22]

Sel1

Same

P8

20

V9

GPIO1_31

0x084

gpmc_csn2

gpmc_be1n

mmc1_cmd

pr1_edio_data_in7

pr1_edio_data_out7

pr1_pru1_pru_r30_13

pr1_pru1_pru_r31_13

gpio1[31]

EMMC

P8

21

U9

GPIO1_30

0x080

gpmc_csn1

gpmc_clk

mmc1_clk

pr1_edio_data_in6

pr1_edio_data_out6

pr1_pru1_pru_r30_12

pr1_pru1_pru_r31_12

gpio1[30]

EMMC

P8

22

V8

GPIO1_5

0x014

gpmc_ad5

mmc1_dat5

-

-

-

-

-

Gpio1[05]

EMMC

P8

23

U8

GPIO1_4

0x010

gpmc_ad4

mmc1_dat4

-

-

-

-

-

Gpio1[04]

EMMC

P8

24

V7

GPIO1_1

0x004

gpmc_ad1

mmc1_dat1

-

-

-

-

-

Gpio1[01]

EMMC

P8

25

U7

GPIO1_0

0x000

gpmc_ad0

mmc1_dat0

-

-

-

-

-

Gpio1[00]

EMMC

P8

26

V6

GPIO1_29

0x07C

gpmc_csn0

-

-

-

-

-

-

gpio1[29]

P8

27

U5

GPIO2_22

0x0E0

lcd_vsync

gpmc_a8

gpmc_a1

pr1_edio_data_in2

pr1_edio_data_out2

pr1_pru1_pru_r30_8

pr1_pru1_pru_r31_8

gpio2[22]

LCD

Expansion0 J7-4

Same

P8

28

V5

GPIO2_24

0x0E8

lcd_pclk

gpmc_a10

pr1_mii0_crs

pr1_edio_data_in4

pr1_edio_data_out4

pr1_pru1_pru_r30_10

pr1_pru1_pru_r31_10

gpio2[24]

LCD

Expansion2 J7-13

P8

29

R5

GPIO2_23

0x0E4

lcd_hsync

gpmc_a9

gpmc_a2

pr1_edio_data_in3

pr1_edio_data_out3

pr1_pru1_pru_r30_9

pr1_pru1_pru_r31_9

gpio2[23]

LCD

Expansion1 J7-6

Same

P8

30

R6

GPIO2_25

0x0EC

lcd_ac_bias_en

gpmc_a11

pr1_mii1_crs

pr1_edio_data_in5

pr1_edio_data_out5

pr1_pru1_pru_r30_11

pr1_pru1_pru_r31_11

gpio2[25]

LCD

Expansion3 J7-8

P8

31

V4

UART1_RXD

0x0D8

lcd_data14

gpmc_a18

eQEP1_index

mcasp0_axr1

uart5_rxd

pr1_mii0_rxd3

uart5_ctsn

gpio0[10]

LCD/BootH

Head2

P8

32

T5

UART5_RTSN

0x0DC

lcd_data15

gpmc_a19

eQEP1_strobe

mcasp0_ahclkx

mcasp0_axr3

pr1_mii0_rxdv

uart5_rtsn

gpio0[11]

LCD/BootL

Head3

P8

33

V3

UART4_RTSN

0x0D4

lcd_data13

gpmc_a17

eQEP1B_in

mcasp0_fsr

mcasp0_axr3

pr1_mii0_rxer

uart4_rtsn

Gpio0[09]

LCD/BootL

Head1

P8

34

U4

UART3_RTSN

0x0CC

lcd_data11

gpmc_a15

ehrpwm1B

mcasp0_ahclkr

mcasp0_axr2

pr1_mii0_rxd0

uart3_rtsn

gpio2[17]

LCD/BootL

P8

35

V2

UART4_CTSN

0x0D0

lcd_data12

gpmc_a16

eQEP1A_in

mcasp0_aclkr

mcasp0_axr2

pr1_mii0_rxlink

uart4_ctsn

Gpio0[08]

LCD/BootL

Head0

P8

36

U3

UART3_CTSN

0x0C8

lcd_data10

gpmc_a14

ehrpwm1A

mcasp0_axr0

-

pr1_mii0_rxd1

uart3_ctsn

gpio2[16]

LCD/BootL

P8

37

U1

UART5_TXD

0x0C0

lcd_data8

gpmc_a12

ehrpwm1_tripzone_in

mcasp0_aclkx

uart5_txd

pr1_mii0_rxd3

uart2_ctsn

gpio2[14]

LCD/BootL

P8

38

U2

UART5_RXD

0x0C4

lcd_data9

gpmc_a13

ehrpwm0_synco

mcasp0_fsx

uart5_rxd

pr1_mii0_rxd2

uart2_rtsn

gpio2[15]

LCD/BootL

P8

39

T3

GPIO2_12

0x0B8

lcd_data6

gpmc_a6

pr1_edio_data_in6

eQEP2_index

pr1_edio_data_out6

pr1_pru1_pru_r30_6

pr1_pru1_pru_r31_6

gpio2[12]

LCD/BootL

P8

40

T4

GPIO2_13

0x0BC

lcd_data7

gpmc_a7

pr1_edio_data_in7

eQEP2_strobe

pr1_edio_data_out7

pr1_pru1_pru_r30_7

pr1_pru1_pru_r31_7

gpio2[13]

LCD/BootL

P8

41

T1

GPIO2_10

0x0B0

lcd_data4

gpmc_a4

pr1_mii0_txd1

eQEP2A_in

-

pr1_pru1_pru_r30_4

pr1_pru1_pru_r31_4

gpio2[10]

LCD/BootH

P8

42

T2

GPIO2_11

0x0B4

lcd_data5

gpmc_a5

pr1_mii0_txd0

eQEP2B_in

-

pr1_pru1_pru_r30_5

pr1_pru1_pru_r31_5

gpio2[11]

LCD/BootH

P8

43

R3

GPIO2_8

0x0A8

lcd_data2

gpmc_a2

pr1_mii0_txd3

ehrpwm2_tripzone_in

-

pr1_pru1_pru_r30_2

pr1_pru1_pru_r31_2

Gpio2[08]

LCD/BootH

Expansion12 J7-10

P8

44

R4

GPIO2_9

0x0AC

lcd_data3

gpmc_a3

pr1_mii0_txd2

ehrpwm0_synco

-

pr1_pru1_pru_r30_3

pr1_pru1_pru_r31_3

Gpio2[09]

LCD/BootH

P8

45

R1

GPIO2_6

0x0A0

lcd_data0

gpmc_a0

pr1_mii_mt0_clk

ehrpwm2A

-

pr1_pru1_pru_r30_0

pr1_pru1_pru_r31_0

Gpio2[06]

LCD/BootL

Expansion10 J7-14

Same

P8

46

R2

GPIO2_7

0x0A4

lcd_data1

gpmc_a1

pr1_mii0_txen

ehrpwm2B

-

pr1_pru1_pru_r30_1

pr1_pru1_pru_r31_1

Gpio2[07]

LCD/BootL

Expansion11 J7-12

P9

1

-

GND

P9

2

-

GND

P9

3

-

DC_3.3V

P9

4

-

DC_3.3V

P9

5

-

VDD_5V

P9

6

-

VDD_5V

P9

7

-

SYS_5V

P9

8

-

SYS_5V

P9

9

-

PWR_BUT

P9

10

A10

SYS_RESETn

RESET_OUT

-

-

-

-

-

-

-

P9

11

T17

UART4_RXD

0x070

gpmc_wait0

mii2_crs

gpmc_csn4

rmii2_crs_dv

mmc1_sdcd

pr1_mii1_col

uart4_rxd

gpio0[30]

Track0

Same

P9

12

U18

GPIO1_28

0x078

gpmc_ben1

mii2_col

gpmc_csn6

mmc2_dat3

gpmc_dir

pr1_mii1_rxlink

mcasp0_aclkr

gpio1[28]

EMU_EN

Same

P9

13

U17

UART4_TXD

0x074

gpmc_wpn

mii2_rxerr

gpmc_csn5

rmii2_rxerr

mmc2_sdcd

pr1_mii1_txen

uart4_txd

gpio0[31]

Recovery/Selected1

Same

P9

14

U14

EHRPWM1A

0x048

gpmc_a2

mii2_txd3

rgmii2_td3

mmc2_dat1

gpmc_a18

pr1_mii1_txd2

ehrpwm1A

gpio1[18]

MFM_read_en

Same

P9

15

R13

GPIO1_16

0x040

gpmc_a0

gmii2_txen

rmii2_tctl

mii2_txen

gpmc_a16

pr1_mii_mt1_clk

ehrpwm1_tripzone_input

gpio1[16]

P9

16

T14

EHRPWM1B

0x04C

gpmc_a3

mii2_txd2

rgmii2_td2

mmc2_dat2

gpmc_a19

pr1_mii1_txd1

ehrpwm1B

gpio1[19]

P9

17

A16

I2C1_SCL

:q

spi0_cs0

mmc2_sdwp

I2C1_SCL

ehrpwm0_synci

pr1_uart0_txd

pr1_edio_data_in1

pr1_edio_data_out1

Gpio0[05]

Head3

Expansion12 J7-15

P9

18

B16

I2C1_SDA

0x158

spi0_d1

mmc1_sdwp

I2C1_SDA

ehrpwm0_tripzone

pr1_uart0_rxd

pr1_edio_data_in0

pr1_edio_data_out0

Gpio0[04]

Head2

Expansion11 J7-13

P9

19

D17

I2C2_SCL

0x17C

uart1_rtsn

timer5

dcan0_rx

I2C2_SCL

spi1_cs1

pr1_uart0_rts_n

pr1_edc_latch1_in

gpio0[13]

EEPROM

I2C2_SCL

Same

P9

20

D18

I2C2_SDA

0x178

uart1_ctsn

timer6

dcan0_tx

I2C2_SDA

spi1_cs0

pr1_uart0_cts_n

pr1_edc_latch0_in

gpio0[12]

EEPROM

I2C2_SDA

Same

P9

21

B17

UART2_TXD

0x154

spi0_d0

uart2_txd

I2C2_SCL

ehrpwm0B

pr1_uart0_rts_n

pr1_edio_latch_in

EMU3

Gpio0[03]

Head1

Expansion3 J7-8

P9

22

A17

UART2_RXD

0x150

spi0_sclk

uart2_rxd

I2C2_SDA

ehrpwm0A

pr1_uart0_cts_n

pr1_edio_sof

EMU2

Gpio0[02]

Head0

Expansion2 J7-12

P9

23

V14

GPIO1_17

0x044

gpmc_a1

gmii2_rxdv

rgmii2_rxdv

mmc2_dat0

gpmc_a17

pr1_mii1_txd3

ehrpwm0_synco

gpio1[17]

P9

24

D15

UART1_TXD

0x184

uart1_txd

mmc2_sdwp

dcan1_rx

I2C1_SCL

-

pr1_uart0_txd

pr1_pru0_pru_r31_16

gpio0[15]

Expansion13 J7-15 Drive 2 selected

Expansion13 J7-10 Drive 2 selected

P9

25

A14

GPIO3_21

0x1AC

mcasp0_ahclkx

eQEP0_strobe

mcasp0_axr3

mcasp1_axr1

EMU4

pr1_pru0_pru_r30_7

pr1_pru0_pru_r31_7

gpio3[21]

Step

Same

P9

26

D16

UART1_RXD

0x180

uart1_rxd

mmc1_sdwp

dcan1_tx

I2C1_SDA

-

pr1_uart0_rxd

pr1_pru1_pru_r31_16

gpio0[14]

Expansion4 J7-16 Drive 1 selected

Same

P9

27

C13

GPIO3_19

0x1A4

mcasp0_fsr

eQEP0B_in

mcasp0_axr3

mcasp1_fsx

EMU2

pr1_pru0_pru_r30_5

pr1_pru0_pru_r31_5

gpio3[19]

Index

Same

P9

28

C12

SPI1_CS0

0x19C

mcasp0_ahclkr

ehrpwm0_synci

mcasp0_axr2

spi1_cs0

eCAP2_in_PWM2_out

pr1_pru0_pru_r30_3

pr1_pru0_pru_r31_3

gpio3[17]

Audio

Wfault

Same

P9

29

B13

SPI1_D0

0x194

mcasp0_fsx

ehrpwm0B

-

spi1_d0

mmc1_sdcd

pr1_pru0_pru_r30_1

pr1_pru0_pru_r31_1

gpio3[15]

Audio

Selected

Same

P9

30

D12

SPI1_D1

0x198

mcasp0_axr0

ehrpwm0_tripzone

-

spi1_d1

mmc2_sdcd

pr1_pru0_pru_r30_2

pr1_pru0_pru_r31_2

gpio3[16]

Audio

Seek_done

Same

P9

31

A13

SPI1_SCLK

0x190

mcasp0_aclkx

ehrpwm0A

-

spi1_sclk

mmc0_sdcd

pr1_pru0_pru_r30_0

pr1_pru0_pru_r31_0

gpio3[14]

Write

Same

P9

32

-

VADC

P9

33

C8

AIN4

P9

34

-

AGND

P9

35

A8

AIN6

P9

36

B8

AIN5

P9

37

B7

AIN2

P9

38

A7

AIN3

P9

39

B6

AIN0

V12_ADC

Same

P9

40

C7

AIN1

P9

41.1

D13

GPIO3_20

0x1A8

mcasp0_axr1

eQEP0_index

-

Mcasp1_axr0

EMU3

pr1_pru0_pru_r30_6

pr1_pru0_pru_r31_6

gpio3[20]

Shared 1

DIR_IN

Same

P9

42.1

B12

GPIO3_18

0x1A0

mcasp0_aclkr

eQEP0A_in

mcaspo_axr2

mcasp1_aclkx

mmc0_sdwp

pr1_pru0_pru_r30_4

pr1_pru0_pru_r31_4

gpio3[18]

Shared 2

Ready

Same

P9

43

-

GND

P9

44

-

GND

P9

45

-

GND

P9

46

-

GND

P9

41.0

D14

CLKOUT2

0x1B4

xdma_event_intr1

-

tclkin

clkout2

timer7

pr1_pru0_pru_r31_16

EMU3

gpio0[20]

Shared 1

P9

42.0

C18

GPIO0_7

0x164

eCAP0_in_PWM0_out

uart3_txd

spi1_cs1

pr1_ecap0_ecap_capin_apwm_o

spi1_sclk

mmc0_sdwp

xdma_event_intr2

Gpio0[07]

Shared 2

Pin

ZCZ Ball

Name

DT Offset

Mode

Usage

0

1

2

3

4

5

6

7

1

-

GND

2

-

GND

3

R9

GPIO1_6

0x018

gpmc_ad6

mmc1_dat6

-

-

-

-

-

gpio1[6]

EMMC

4

T9

GPIO1_7

0x01C

gpmc_ad7

mmc1_dat7

-

-

-

-

-

gpio1[7]

EMMC

5

R8

GPIO1_2

0x008

gpmc_ad2

mmc1_dat2

-

-

-

-

-

gpio1[2]

EMMC

6

T8

GPIO1_3

0x00C

gpmc_ad3

mmc1_dat3

-

-

-

-

-

gpio1[3]

EMMC

7

R7

TIMER4

0x090

gpmc_advn_ale

-

timer4

-

-

-

-

gpio2[2]

8

T7

TIMER7

0x094

gpmc_oen_ren

-

timer7

-

-

-

-

gpio2[3]

9

T6

TIMER5

0x09C

gpmc_ben0_cle

-

timer5

-

-

-

-

gpio2[5]

10

U6

TIMER6

0x098

gpmc_wen

-

timer6

-

-

-

-

gpio2[4]

11

R12

GPIO1_13

0x034

gpmc_ad13

lcd_data18

mmc1_dat5

mmc2_dat1

eQEP2B_in

pr1_mii0_txd1

pr1_pru0_pru_r30_15

gpio1[13]

12

T12

GPIO1_12

0x030

gpmc_ad12

lcd_data19

mmc1_dat4

mmc2_dat0

eQEP2A_IN

pr1_mii0_txd2

pr1_pru0_pru_r30_14

gpio1[12]

13

T10

EHRPWM2B

0x024

gpmc_ad9

lcd_data22

mmc1_dat1

mmc2_dat5

ehrpwm2B

pr1_mii0_col

-

gpio0[23]

14

T11

GPIO0_26

0x028

gpmc_ad10

lcd_data21

mmc1_dat2

mmc2_dat6

ehrpwm2_tripzone_in

pr1_mii0_txen

-

gpio0[26]

15

U13

GPIO1_15

0x03C

gpmc_ad15

lcd_data16

mmc1_dat7

mmc2_dat3

eQEP2_strobe

pr1_ecap0_ecap_capin_apwm_o

pr1_pru0_pru_r31_15

gpio1[15]

16

V13

GPIO1_14

0x038

gpmc_ad14

lcd_data17

mmc1_dat6

mmc2_dat2

eQEP2_index

pr1_mii0_txd0

pr1_pru0_pru_r31_14

gpio1[14]

17

U12

GPIO0_27

0x02C

gpmc_ad11

lcd_data20

mmc1_dat3

mmc2_dat7

ehrpwm0_synco

pr1_mii0_txd3

-

gpio0[27]

18

V12

GPIO2_1

0x08C

gpmc_clk

lcd_memory_clk

gpmc_wait1

mmc2_clk

pr1_mii1_crs

pr1_mdio_mdclk

mcasp0_fsr

gpio2[1]

19

U10

EHRPWM2A

0x020

gpmc_ad8

lcd_data23

mmc1_dat0

mmc2_dat4

ehrpwm2A

pr1_mii_mt0_clk

-

gpio0[22]

20

V9

GPIO1_31

0x084

gpmc_csn2

gpmc_be1n

mmc1_cmd

pr1_edio_data_in7

pr1_edio_data_out7

pr1_pru1_pru_r30_13

pr1_pru1_pru_r31_13

gpio1[31]

EMMC

21

U9

GPIO1_30

0x080

gpmc_csn1

gpmc_clk

mmc1_clk

pr1_edio_data_in6

pr1_edio_data_out6

pr1_pru1_pru_r30_12

pr1_pru1_pru_r31_12

gpio1[30]

EMMC

Output

22

V8

GPIO1_5

0x014

gpmc_ad5

mmc1_dat5

-

-

-

-

-

gpio1[5]

EMMC

Input

23

U8

GPIO1_4

0x010

gpmc_ad4

mmc1_dat4

-

-

-

-

-

gpio1[4]

EMMC

I/O

24

V7

GPIO1_1

0x004

gpmc_ad1

mmc1_dat1

-

-

-

-

-

gpio1[1]

EMMC

25

U7

GPIO1_0

0x000

gpmc_ad0

mmc1_dat0

-

-

-

-

-

gpio1[0]

EMMC

26

V6

GPIO1_29

0x07C

gpmc_csn0

-

-

-

-

-

-

gpio1[29]

27

U5

GPIO2_22

0x0E0

lcd_vsync

gpmc_a8

gpmc_a1

pr1_edio_data_in2

pr1_edio_data_out2

pr1_pru1_pru_r30_8

pr1_pru1_pru_r31_8

gpio2[22]

LCD

28

V5

GPIO2_24

0x0E8

lcd_pclk

gpmc_a10

pr1_mii0_crs

pr1_edio_data_in4

pr1_edio_data_out4

pr1_pru1_pru_r30_10

pr1_pru1_pru_r31_10

gpio2[24]

LCD

29

R5

GPIO2_23

0x0E4

lcd_hsync

gpmc_a9

gpmc_a2

pr1_edio_data_in3

pr1_edio_data_out3

pr1_pru1_pru_r30_9

pr1_pru1_pru_r31_9

gpio2[23]

LCD

30

R6

GPIO2_25

0x0EC

lcd_ac_bias_en

gpmc_a11

pr1_mii1_crs

pr1_edio_data_in5

pr1_edio_data_out5

pr1_pru1_pru_r30_11

pr1_pru1_pru_r31_11

gpio2[25]

LCD

31

V4

UART5_CTSN

0x0D8

lcd_data14

gpmc_a18

eQEP1_index

mcasp0_axr1

uart5_rxd

pr1_mii0_rxd3

uart5_ctsn

gpio0[10]

LCD

32

T5

UART5_RTSN

0x0DC

lcd_data15

gpmc_a19

eQEP1_strobe

mcasp0_ahclkx

mcasp0_axr3

pr1_mii0_rxdv

uart5_rtsn

gpio0[11]

LCD

33

V3

UART4_RTSN

0x0D4

lcd_data13

gpmc_a17

eQEP1B_in

mcasp0_fsr

mcasp0_axr3

pr1_mii0_rxer

uart4_rtsn

gpio0[9]

LCD

34

U4

UART3_RTSN

0x0CC

lcd_data11

gpmc_a15

ehrpwm1B

mcasp0_ahclkr

mcasp0_axr2

pr1_mii0_rxd0

uart3_rtsn

gpio2[17]

LCD

35

V2

UART4_CTSN

0x0D0

lcd_data12

gpmc_a16

eQEP1A_in

mcasp0_aclkr

mcasp0_axr2

pr1_mii0_rxlink

uart4_ctsn

gpio0[8]

LCD

36

U3

UART3_CTSN

0x0C8

lcd_data10

gpmc_a14

ehrpwm1A

mcasp0_axr0

-

pr1_mii0_rxd1

uart3_ctsn

gpio2[16]

LCD

37

U1

UART5_TXD

0x0C0

lcd_data8

gpmc_a12

ehrpwm1_tripzone_in

mcasp0_aclkx

uart5_txd

pr1_mii0_rxd3

uart2_ctsn

gpio2[14]

LCD

38

U2

UART5_RXD

0x0C4

lcd_data9

gpmc_a13

ehrpwm0_synco

mcasp0_fsx

uart5_rxd

pr1_mii0_rxd2

uart2_rtsn

gpio2[15]

LCD

39

T3

GPIO2_12

0x0B8

lcd_data6

gpmc_a6

pr1_edio_data_in6

eQEP2_index

pr1_edio_data_out6

pr1_pru1_pru_r30_6

pr1_pru1_pru_r31_6

gpio2[12]

LCD

40

T4

GPIO2_13

0x0BC

lcd_data7

gpmc_a7

pr1_edio_data_in7

eQEP2_strobe

pr1_edio_data_out7

pr1_pru1_pru_r30_7

pr1_pru1_pru_r31_7

gpio2[13]

LCD

41

T1

GPIO2_10

0x0B0

lcd_data4

gpmc_a4

pr1_mii0_txd1

eQEP2A_in

-

pr1_pru1_pru_r30_4

pr1_pru1_pru_r31_4

gpio2[10]

LCD

42

T2

GPIO2_11

0x0B4

lcd_data5

gpmc_a5

pr1_mii0_txd0

eQEP2B_in

-

pr1_pru1_pru_r30_5

pr1_pru1_pru_r31_5

gpio2[11]

LCD

43

R3

GPIO2_8

0x0A8

lcd_data2

gpmc_a2

pr1_mii0_txd3

ehrpwm2_tripzone_in

-

pr1_pru1_pru_r30_2

pr1_pru1_pru_r31_2

gpio2[8]

LCD

44

R4

GPIO2_9

0x0AC

lcd_data3

gpmc_a3

pr1_mii0_txd2

ehrpwm0_synco

-

pr1_pru1_pru_r30_3

pr1_pru1_pru_r31_3

gpio2[9]

LCD

45

R1

GPIO2_6

0x0A0

lcd_data0

gpmc_a0

pr1_mii_mt0_clk

ehrpwm2A

-

pr1_pru1_pru_r30_0

pr1_pru1_pru_r31_0

gpio2[6]

LCD

46

R2

GPIO2_7

0x0A4

lcd_data1

gpmc_a1

pr1_mii0_txen

ehrpwm2B

-

pr1_pru1_pru_r30_1

pr1_pru1_pru_r31_1

gpio2[7]

LCD

Pin

ZCZ Ball

Name

DT Offset

Mode

Usage

0

1

2

3

4

5

6

7

1

-

GND

2

-

GND

3

-

DC_3.3V

4

-

DC_3.3V

5

-

VDD_5V

6

-

VDD_5V

7

-

SYS_5V

8

-

SYS_5V

9

-

PWR_BUT

10

A10

SYS_RESETn

RESET_OUT

-

-

-

-

-

-

-

11

T17

UART4_RXD

0x070

gpmc_wait0

mii2_crs

gpmc_csn4

rmii2_crs_dv

mmc1_sdcd

pr1_mii1_col

uart4_rxd

gpio0[30]

12

U18

GPIO1_28

0x078

gpmc_ben1

mii2_col

gpmc_csn6

mmc2_dat3

gpmc_dir

pr1_mii1_rxlink

mcasp0_aclkr

gpio1[28]

13

U17

UART4_TXD

0x074

gpmc_wpn

mii2_rxerr

gpmc_csn5

rmii2_rxerr

mmc2_sdcd

pr1_mii1_txen

uart4_txd

gpio0[31]

14

U14

EHRPWM1A

0x048

gpmc_a2

mii2_txd3

rgmii2_td3

mmc2_dat1

gpmc_a18

pr1_mii1_txd2

ehrpwm1A

gpio1[18]

15

R13

GPIO1_16

0x040

gpmc_a0

gmii2_txen

rmii2_tctl

mii2_txen

gpmc_a16

pr1_mii_mt1_clk

ehrpwm1_tripzone_input

gpio1[16]

16

T14

EHRPWM1B

0x04C

gpmc_a3

mii2_txd2

rgmii2_td2

mmc2_dat2

gpmc_a19

pr1_mii1_txd1

ehrpwm1B

gpio1[19]

17

A16

I2C1_SCL

0x15C

spi0_cs0

mmc2_sdwp

I2C1_SCL

ehrpwm0_synci

pr1_uart0_txd

pr1_edio_data_in1

pr1_edio_data_out1

gpio0[5]

18

B16

I2C1_SDA

0x158

spi0_d1

mmc1_sdwp

I2C1_SDA

ehrpwm0_tripzone

pr1_uart0_rxd

pr1_edio_data_in0

pr1_edio_data_out0

gpio0[4]

19

D17

I2C2_SCL

0x17C

uart1_rtsn

timer5

dcan0_rx

I2C2_SCL

spi1_cs1

pr1_uart0_rts_n

pr1_edc_latch1_in

gpio0[13]

EEPROM

20

D18

I2C2_SDA

0x178

uart1_ctsn

timer6

dcan0_tx

I2C2_SDA

spi1_cs0

pr1_uart0_cts_n

pr1_edc_latch0_in

gpio0[12]

EEPROM

21

B17

UART2_TXD

0x154

spi0_d0

uart2_txd

I2C2_SCL

ehrpwm0B

pr1_uart0_rts_n

pr1_edio_latch_in

EMU3

gpio0[3]

22

A17

UART2_RXD

0x150

spi0_sclk

uart2_rxd

I2C2_SDA

ehrpwm0A

pr1_uart0_cts_n

pr1_edio_sof

EMU2

gpio0[2]

Output

23

V14

GPIO1_17

0x044

gpmc_a1

gmii2_rxdv

rgmii2_rxdv

mmc2_dat0

gpmc_a17

pr1_mii1_txd3

ehrpwm0_synco

gpio1[17]

Input

24

D15

UART1_TXD

0x184

uart1_txd

mmc2_sdwp

dcan1_rx

I2C1_SCL

-

pr1_uart0_txd

pr1_pru0_pru_r31_16

gpio0[15]

I/O

25

A14

GPIO3_21

0x1AC

mcasp0_ahclkx

eQEP0_strobe

mcasp0_axr3

mcasp1_axr1

EMU4

pr1_pru0_pru_r30_7

pr1_pru0_pru_r31_7

gpio3[21]

26

D16

UART1_RXD

0x180

uart1_rxd

mmc1_sdwp

dcan1_tx

I2C1_SDA

-

pr1_uart0_rxd

pr1_pru1_pru_r31_16

gpio0[14]

27

C13

GPIO3_19

0x1A4

mcasp0_fsr

eQEP0B_in

mcasp0_axr3

mcasp1_fsx

EMU2

pr1_pru0_pru_r30_5

pr1_pru0_pru_r31_5

gpio3[19]

28

C12

SPI1_CS0

0x19C

mcasp0_ahclkr

ehrpwm0_synci

mcasp0_axr2

spi1_cs0

eCAP2_in_PWM2_out

pr1_pru0_pru_r30_3

pr1_pru0_pru_r31_3

gpio3[17]

Audio

29

B13

SPI1_D0

0x194

mcasp0_fsx

ehrpwm0B

-

spi1_d0

mmc1_sdcd

pr1_pru0_pru_r30_1

pr1_pru0_pru_r31_1

gpio3[15]

Audio

30

D12

SPI1_D1

0x198

mcasp0_axr0

ehrpwm0_tripzone

-

spi1_d1

mmc2_sdcd

pr1_pru0_pru_r30_2

pr1_pru0_pru_r31_2

gpio3[16]

Audio

31

A13

SPI1_SCLK

0x190

mcasp0_aclkx

ehrpwm0A

-

spi1_sclk

mmc0_sdcd

pr1_pru0_pru_r30_0

pr1_pru0_pru_r31_0

gpio3[14]

32

-

VADC

33

C8

AIN4

34

-

AGND

35

A8

AIN6

36

B8

AIN5

37

B7

AIN2

38

A7

AIN3

39

B6

AIN0

40

C7

AIN1

41

D14

CLKOUT2

0x1B4

xdma_event_intr1

-

tclkin

clkout2

timer7

pr1_pru0_pru_r31_16

EMU3

gpio0[20]

Shared 1

#

D13

GPIO3_20

0x1A8

mcasp0_axr1

eQEP0_index

-

Mcasp1_axr0

EMU3

pr1_pru0_pru_r30_6

pr1_pru0_pru_r31_6

gpio3[20]

Shared 1

42

C18

GPIO0_7

0x164

eCAP0_in_PWM0_out

uart3_txd

spi1_cs1

pr1_ecap0_ecap_capin_apwm_o

spi1_sclk

mmc0_sdwp

xdma_event_intr2

gpio0[7]

Shared 2

@

B12

GPIO3_18

0x1A0

mcasp0_aclkr

eQEP0A_in

mcaspo_axr2

mcasp1_aclkx

mmc0_sdwp

pr1_pru0_pru_r30_4

pr1_pru0_pru_r31_4

gpio3[18]

Shared 2

43

-

GND

44

-

GND

45

-

GND

46

-

GND

#,@ - 2 Signals available on pins 41 and 42, set the unused signal to Input

Slew Rate

Type

Pull up/down

Mode

Modify This Line >>>>

Fast

Input

Pull Down

0

0

0

0

0

Slew Rate

Fast

0

Bit 6

Slow

1

Input/Output

Output

1

Bit 5

Input

0

Pull Up/Down

Pull Down

0

Bits 3-4

Disabled

1

Pull Up

2

Mode

0

Bits 0-2

1

2

3

4

5

6

7